mirror of
https://github.com/reactos/reactos.git
synced 2026-06-21 22:22:48 +08:00
Implement disambler for stwu, left todo add it to the Converter
svn path=/trunk/; revision=25514
This commit is contained in:
@@ -187,6 +187,19 @@ CPU_INT ConvertToIA32Process( FILE *outfp,
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}
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}
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}
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if ((pMystart->type & 32)== 32)
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{
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/* source are [reg - xx] */
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if (setup_ebp == 1)
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fprintf(outfp,"not supporet\n");
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else
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{
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fprintf(outfp,"not supporet\n");
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fprintf(outfp,"mov eax, word[eax%d]\n",pMystart->src_extra);
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}
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}
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} /* end pMyBrainAnalys->type & 8 */
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}
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@@ -95,8 +95,8 @@ int main(int argc, char * argv[])
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//}
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//return LoadPFileImage(infile,outfile,BaseAddress,cpuid,type, mode);
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// return LoadPFileImage("e:\\testppc.exe","e:\\cputointel.asm",0,0,0,0); // disambler
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return LoadPFileImage("e:\\testms.exe","e:\\cputointel.asm",0,0,0,1); // convert
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return LoadPFileImage("e:\\testppc.exe","e:\\cputointel.asm",0,0,0,2); // disambler
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// return LoadPFileImage("e:\\testms.exe","e:\\cputointel.asm",0,0,0,1); // convert
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}
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@@ -12,6 +12,7 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer,
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/* here we put the prototype for the opcode api that brain need we show a example for it */
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CPU_INT PPC_Blr( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch);
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CPU_INT PPC_Li( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch);
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CPU_INT PPC_Stwu( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch);
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/* Export comment thing see m68k for example
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* in dummy we do not show it, for it is diffent for each cpu
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@@ -58,8 +58,18 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer,
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cpuint = GetData32Le(&cpu_buffer[cpu_pos]);
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/* blr */
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if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_Blr))) == ConvertBitToByte32(cpuPPCInit_Blr))
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{
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retsize = PPC_Blr( outfp, cpu_buffer, cpu_pos, cpu_size,
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BaseAddress, cpuarch);
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if (retsize<0)
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retcode = 1;
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else
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cpu_pos += retsize;
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}
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/* 0xE = Li*/
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/* Li*/
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if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_Li))) == ConvertBitToByte32(cpuPPCInit_Li))
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{
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retsize = PPC_Li( outfp, cpu_buffer, cpu_pos, cpu_size,
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@@ -70,17 +80,17 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer,
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cpu_pos += retsize;
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}
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/* hard code the op blr */
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if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_Blr))) == ConvertBitToByte32(cpuPPCInit_Blr))
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/* stwu */
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if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_stwu))) == ConvertBitToByte32(cpuPPCInit_stwu))
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{
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retsize = PPC_Blr( outfp, cpu_buffer, cpu_pos, cpu_size,
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retsize = PPC_Stwu( outfp, cpu_buffer, cpu_pos, cpu_size,
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BaseAddress, cpuarch);
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if (retsize<0)
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retcode = 1;
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else
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cpu_pos += retsize;
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}
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/* Found all Opcode and breakout and return no error found */
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if (cpu_pos >=cpu_size)
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{
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@@ -105,5 +115,6 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer,
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break;
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}
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}
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return retcode;
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}
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@@ -9,16 +9,10 @@
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* same. thuse bit are always 0 or 1
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*/
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CPU_BYTE cpuPPCInit_Blr[32] = {0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,1,1,1,0};
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/* xxxx xxxx xxxx xxxx DDD0 0000 xxxx xxDD
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* 2222 2222 2222 2222 2222 2222 0011 1022 Li
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*/
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CPU_BYTE cpuPPCInit_Li[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,0,0,0,0,0,0,0,1,1, 1,0,2,2};
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/* FIXME RA should be 0 in stwu */
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CPU_BYTE cpuPPCInit_Blr[32] = {0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,1,1,1,0};
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CPU_BYTE cpuPPCInit_Li[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,0,0,0,0,0,0,0,1,1,1,0,2,2};
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CPU_BYTE cpuPPCInit_stwu[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,0,0,1,0,1,2,2};
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/* mask */
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/*
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* no mask we implement function getting the reg right
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@@ -27,10 +27,19 @@
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* value +1 and higher : who many byte we should add to cpu_pos
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*/
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/* only for ppc */
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#define PPC_GetBitArray6toA(opcode) (((opcode & 0x3) << 3) | ((opcode & 0xE000) >> 13))
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/* Get Dest register */
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#define PPC_GetBitArrayDstReg(opcode) (((opcode & 0x3) << 3) | ((opcode & 0xE000) >> 13))
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/* Get Source register */
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CPU_UNINT PPC_GetBitArrayBto31xx(CPU_UNINT opcode)
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{
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CPU_INT x1;
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/* FIXME make it to a macro
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* not tested to 100% yet */
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x1 = ((opcode & 0x1F00)>>8);
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return x1;
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}
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CPU_UNINT PPC_GetBitArrayBto31(CPU_UNINT opcode)
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@@ -79,9 +88,39 @@ CPU_INT PPC_Li( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos,
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pMyBrainAnalys->type= 8 + 16; /* 8 dst reg, 16 imm */
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pMyBrainAnalys->src_size = 16;
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pMyBrainAnalys->src = PPC_GetBitArrayBto31(opcode);
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pMyBrainAnalys->dst = PPC_GetBitArray6toA(opcode);
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pMyBrainAnalys->dst = PPC_GetBitArrayDstReg(opcode);
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pMyBrainAnalys->memAdr=BaseAddress;
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return 4;
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}
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CPU_INT PPC_Stwu( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos,
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CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch)
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{
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CPU_UNINT opcode;
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CPU_SHORT tmp = 0;
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opcode = GetData32Le(cpu_buffer);
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BaseAddress +=cpu_pos;
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/* own translatons langues */
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if (AllocAny()!=0) /* alloc memory for pMyBrainAnalys */
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{
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return -1;
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}
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tmp = _byteswap_ushort( ((CPU_SHORT)((opcode >> 16) & 0xffff)));
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pMyBrainAnalys->op = OP_ANY_mov;
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pMyBrainAnalys->type= 2 + 8 + 32; /* 2 src reg 8 dst reg, 32 neg */
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pMyBrainAnalys->src_size = 16;
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pMyBrainAnalys->dst_size = 16;
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pMyBrainAnalys->src = PPC_GetBitArrayBto31xx(opcode);
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pMyBrainAnalys->dst = PPC_GetBitArrayDstReg(opcode);
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pMyBrainAnalys-> src_extra = tmp;
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pMyBrainAnalys->memAdr=BaseAddress;
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return 4;
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}
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@@ -160,6 +160,9 @@ CPU_INT LoadPFileImage( char *infileName, char *outputfileName,
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fclose(outfp);
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return 0;
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}
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/* fixme */
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return -1;
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}
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if (type== 1)
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@@ -17,7 +17,6 @@ opcode Name Desciptions
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Here how the primary opcode work
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xxxx xxxx xxxx xxxx DDDS SSSS 3333 33DD
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@@ -26,8 +25,8 @@ xxxx xxxx xxxx xxxx DDDS SSSS 3333 33DD
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D = Destions register
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S = Source reigters
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opcode
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------------------------
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|bit order: 0123 45 67|
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-------------------------
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|bit order: 5432 10 67 |
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------- ------- ----------- ----
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34: | 0c 00 | | e1 93 | stw r31,12(r1) 0000 1100 0000 0000 1110 0001 | 1001 00 | 00
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38: | 14 00 | | 01 90 | stw r0,20(r1) 0001 0100 0000 0000 0000 0001 | 1001 00 | 11
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@@ -42,11 +41,33 @@ S = Source reigters
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\ /
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The address offset 12 or 20
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opcode
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---------------------------------------------------------
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|bit order: pos 1111 1111 1111 1111 0000 0000 0000 0000 |
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| 89AB CDEF 0123 4567 89AB CDEF 0123 4567 |
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| 5432 10 |
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|---------------------------------------------------------|
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| bits 0000 1100 0000 0000 1110 0001 1001 0000 |
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---------------------------------------------------------
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| math (opcode>>2) & 0x3F |
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---------------------------------------------------------
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Dest Register
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---------------------------------------------------------
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|bit order: pos 1111 1111 1111 1111 0000 0000 0000 0000 |
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| 210 43 |
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|---------------------------------------------------------|
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| bits 0000 1100 0000 0000 1110 0001 1001 0000 |
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---------------------------------------------------------
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| math (((opcode & 0x3) << 3) | ((opcode & 0xE000) >> 13))|
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---------------------------------------------------------
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source Register
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---------------------------------------------------------
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|bit order: pos 1111 1111 1111 1111 0000 0000 0000 0000 |
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| x xxxx |
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|---------------------------------------------------------|
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| bits 0000 1100 0000 0000 1110 0001 1001 0000 |
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---------------------------------------------------------
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| math |
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---------------------------------------------------------
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@@ -31,6 +31,7 @@ typedef struct _BrainAnalys
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CPU_INT type; /* 1 = source are memmory, 2 source are register */
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/* 4 = dest are memmory, 8 dest are register */
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/* 16 = source are imm */
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/* 32 = soucre -xx(r1) or [eax-xx] */
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CPU_INT src_size; /* who many bits are src not vaild for reg*/
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CPU_INT dst_size; /* who many bits are dst not vaild for reg*/
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@@ -38,6 +39,8 @@ typedef struct _BrainAnalys
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CPU_UNINT64 src;
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CPU_UNINT64 dst;
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CPU_INT src_extra; /* if type == 32 are set */
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CPU_UNINT memAdr; /* where are we in the current memory pos + baseaddress */
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CPU_INT row; /* 0 = no row,
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@@ -7,6 +7,9 @@
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#define CPU_UNINT unsigned int
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#define CPU_INT int
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/* 16 bits signed */
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#define CPU_SHORT short
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/* 8bits unsigned */
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#define CPU_BYTE unsigned char
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