diff --git a/rosapps/devutils/cputointel/ConvertToIA32Process.c b/rosapps/devutils/cputointel/ConvertToIA32Process.c index 5c062c19bff..20d8a6487dd 100644 --- a/rosapps/devutils/cputointel/ConvertToIA32Process.c +++ b/rosapps/devutils/cputointel/ConvertToIA32Process.c @@ -187,6 +187,19 @@ CPU_INT ConvertToIA32Process( FILE *outfp, } } } + + if ((pMystart->type & 32)== 32) + { + /* source are [reg - xx] */ + if (setup_ebp == 1) + fprintf(outfp,"not supporet\n"); + else + { + fprintf(outfp,"not supporet\n"); + fprintf(outfp,"mov eax, word[eax%d]\n",pMystart->src_extra); + } + + } } /* end pMyBrainAnalys->type & 8 */ } diff --git a/rosapps/devutils/cputointel/CpuToIntel.c b/rosapps/devutils/cputointel/CpuToIntel.c index e442712bce6..b1174c71d2f 100644 --- a/rosapps/devutils/cputointel/CpuToIntel.c +++ b/rosapps/devutils/cputointel/CpuToIntel.c @@ -95,8 +95,8 @@ int main(int argc, char * argv[]) //} //return LoadPFileImage(infile,outfile,BaseAddress,cpuid,type, mode); - // return LoadPFileImage("e:\\testppc.exe","e:\\cputointel.asm",0,0,0,0); // disambler - return LoadPFileImage("e:\\testms.exe","e:\\cputointel.asm",0,0,0,1); // convert + return LoadPFileImage("e:\\testppc.exe","e:\\cputointel.asm",0,0,0,2); // disambler + // return LoadPFileImage("e:\\testms.exe","e:\\cputointel.asm",0,0,0,1); // convert } diff --git a/rosapps/devutils/cputointel/From/PPC/PPC.h b/rosapps/devutils/cputointel/From/PPC/PPC.h index 169c53ae6b8..c27f7d9a168 100644 --- a/rosapps/devutils/cputointel/From/PPC/PPC.h +++ b/rosapps/devutils/cputointel/From/PPC/PPC.h @@ -12,6 +12,7 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer, /* here we put the prototype for the opcode api that brain need we show a example for it */ CPU_INT PPC_Blr( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch); CPU_INT PPC_Li( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch); +CPU_INT PPC_Stwu( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch); /* Export comment thing see m68k for example * in dummy we do not show it, for it is diffent for each cpu diff --git a/rosapps/devutils/cputointel/From/PPC/PPCBrain.c b/rosapps/devutils/cputointel/From/PPC/PPCBrain.c index 0c95fc09b94..5b3b87b44d4 100644 --- a/rosapps/devutils/cputointel/From/PPC/PPCBrain.c +++ b/rosapps/devutils/cputointel/From/PPC/PPCBrain.c @@ -58,8 +58,18 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer, cpuint = GetData32Le(&cpu_buffer[cpu_pos]); + /* blr */ + if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_Blr))) == ConvertBitToByte32(cpuPPCInit_Blr)) + { + retsize = PPC_Blr( outfp, cpu_buffer, cpu_pos, cpu_size, + BaseAddress, cpuarch); + if (retsize<0) + retcode = 1; + else + cpu_pos += retsize; + } - /* 0xE = Li*/ + /* Li*/ if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_Li))) == ConvertBitToByte32(cpuPPCInit_Li)) { retsize = PPC_Li( outfp, cpu_buffer, cpu_pos, cpu_size, @@ -70,17 +80,17 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer, cpu_pos += retsize; } - /* hard code the op blr */ - if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_Blr))) == ConvertBitToByte32(cpuPPCInit_Blr)) + /* stwu */ + if ((cpuint - (cpuint & GetMaskByte32(cpuPPCInit_stwu))) == ConvertBitToByte32(cpuPPCInit_stwu)) { - retsize = PPC_Blr( outfp, cpu_buffer, cpu_pos, cpu_size, + retsize = PPC_Stwu( outfp, cpu_buffer, cpu_pos, cpu_size, BaseAddress, cpuarch); if (retsize<0) retcode = 1; else cpu_pos += retsize; } - + /* Found all Opcode and breakout and return no error found */ if (cpu_pos >=cpu_size) { @@ -105,5 +115,6 @@ CPU_INT PPCBrain( CPU_BYTE *cpu_buffer, break; } } + return retcode; } diff --git a/rosapps/devutils/cputointel/From/PPC/PPCBrain.h b/rosapps/devutils/cputointel/From/PPC/PPCBrain.h index 4232c36b8d4..9e6bf4cb658 100644 --- a/rosapps/devutils/cputointel/From/PPC/PPCBrain.h +++ b/rosapps/devutils/cputointel/From/PPC/PPCBrain.h @@ -9,16 +9,10 @@ * same. thuse bit are always 0 or 1 */ -CPU_BYTE cpuPPCInit_Blr[32] = {0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,1,1,1,0}; - - -/* xxxx xxxx xxxx xxxx DDD0 0000 xxxx xxDD - * 2222 2222 2222 2222 2222 2222 0011 1022 Li - */ -CPU_BYTE cpuPPCInit_Li[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,0,0,0,0,0,0,0,1,1, 1,0,2,2}; - - - +/* FIXME RA should be 0 in stwu */ +CPU_BYTE cpuPPCInit_Blr[32] = {0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,1,1,1,0}; +CPU_BYTE cpuPPCInit_Li[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,0,0,0,0,0,0,0,1,1,1,0,2,2}; +CPU_BYTE cpuPPCInit_stwu[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,0,0,1,0,1,2,2}; /* mask */ /* * no mask we implement function getting the reg right diff --git a/rosapps/devutils/cputointel/From/PPC/PPCopcode.c b/rosapps/devutils/cputointel/From/PPC/PPCopcode.c index 2eae149614d..92d58c84ac7 100644 --- a/rosapps/devutils/cputointel/From/PPC/PPCopcode.c +++ b/rosapps/devutils/cputointel/From/PPC/PPCopcode.c @@ -27,10 +27,19 @@ * value +1 and higher : who many byte we should add to cpu_pos */ -/* only for ppc */ -#define PPC_GetBitArray6toA(opcode) (((opcode & 0x3) << 3) | ((opcode & 0xE000) >> 13)) +/* Get Dest register */ +#define PPC_GetBitArrayDstReg(opcode) (((opcode & 0x3) << 3) | ((opcode & 0xE000) >> 13)) +/* Get Source register */ +CPU_UNINT PPC_GetBitArrayBto31xx(CPU_UNINT opcode) +{ + CPU_INT x1; + /* FIXME make it to a macro + * not tested to 100% yet */ + x1 = ((opcode & 0x1F00)>>8); + return x1; +} CPU_UNINT PPC_GetBitArrayBto31(CPU_UNINT opcode) @@ -79,9 +88,39 @@ CPU_INT PPC_Li( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, pMyBrainAnalys->type= 8 + 16; /* 8 dst reg, 16 imm */ pMyBrainAnalys->src_size = 16; pMyBrainAnalys->src = PPC_GetBitArrayBto31(opcode); - pMyBrainAnalys->dst = PPC_GetBitArray6toA(opcode); + pMyBrainAnalys->dst = PPC_GetBitArrayDstReg(opcode); pMyBrainAnalys->memAdr=BaseAddress; return 4; } + +CPU_INT PPC_Stwu( FILE *out, CPU_BYTE * cpu_buffer, CPU_UNINT cpu_pos, + CPU_UNINT cpu_size, CPU_UNINT BaseAddress, CPU_UNINT cpuarch) +{ + CPU_UNINT opcode; + CPU_SHORT tmp = 0; + + opcode = GetData32Le(cpu_buffer); + + BaseAddress +=cpu_pos; + + /* own translatons langues */ + if (AllocAny()!=0) /* alloc memory for pMyBrainAnalys */ + { + return -1; + } + + tmp = _byteswap_ushort( ((CPU_SHORT)((opcode >> 16) & 0xffff))); + + pMyBrainAnalys->op = OP_ANY_mov; + pMyBrainAnalys->type= 2 + 8 + 32; /* 2 src reg 8 dst reg, 32 neg */ + pMyBrainAnalys->src_size = 16; + pMyBrainAnalys->dst_size = 16; + pMyBrainAnalys->src = PPC_GetBitArrayBto31xx(opcode); + pMyBrainAnalys->dst = PPC_GetBitArrayDstReg(opcode); + pMyBrainAnalys-> src_extra = tmp; + pMyBrainAnalys->memAdr=BaseAddress; + + return 4; +} diff --git a/rosapps/devutils/cputointel/ImageLoader.c b/rosapps/devutils/cputointel/ImageLoader.c index 4c959c210f0..e89a206bd9c 100644 --- a/rosapps/devutils/cputointel/ImageLoader.c +++ b/rosapps/devutils/cputointel/ImageLoader.c @@ -160,6 +160,9 @@ CPU_INT LoadPFileImage( char *infileName, char *outputfileName, fclose(outfp); return 0; } + + /* fixme */ + return -1; } if (type== 1) diff --git a/rosapps/devutils/cputointel/OpCodePPC.txt b/rosapps/devutils/cputointel/OpCodePPC.txt index 2b201a671c7..53ecb06b50e 100644 --- a/rosapps/devutils/cputointel/OpCodePPC.txt +++ b/rosapps/devutils/cputointel/OpCodePPC.txt @@ -17,7 +17,6 @@ opcode Name Desciptions - Here how the primary opcode work xxxx xxxx xxxx xxxx DDDS SSSS 3333 33DD @@ -26,8 +25,8 @@ xxxx xxxx xxxx xxxx DDDS SSSS 3333 33DD D = Destions register S = Source reigters opcode - ------------------------ - |bit order: 0123 45 67| + ------------------------- + |bit order: 5432 10 67 | ------- ------- ----------- ---- 34: | 0c 00 | | e1 93 | stw r31,12(r1) 0000 1100 0000 0000 1110 0001 | 1001 00 | 00 38: | 14 00 | | 01 90 | stw r0,20(r1) 0001 0100 0000 0000 0000 0001 | 1001 00 | 11 @@ -42,11 +41,33 @@ S = Source reigters \ / The address offset 12 or 20 - + +opcode --------------------------------------------------------- |bit order: pos 1111 1111 1111 1111 0000 0000 0000 0000 | -| 89AB CDEF 0123 4567 89AB CDEF 0123 4567 | +| 5432 10 | |---------------------------------------------------------| | bits 0000 1100 0000 0000 1110 0001 1001 0000 | --------------------------------------------------------- +| math (opcode>>2) & 0x3F | + --------------------------------------------------------- +Dest Register + --------------------------------------------------------- +|bit order: pos 1111 1111 1111 1111 0000 0000 0000 0000 | +| 210 43 | +|---------------------------------------------------------| +| bits 0000 1100 0000 0000 1110 0001 1001 0000 | + --------------------------------------------------------- +| math (((opcode & 0x3) << 3) | ((opcode & 0xE000) >> 13))| + --------------------------------------------------------- + +source Register + --------------------------------------------------------- +|bit order: pos 1111 1111 1111 1111 0000 0000 0000 0000 | +| x xxxx | +|---------------------------------------------------------| +| bits 0000 1100 0000 0000 1110 0001 1001 0000 | + --------------------------------------------------------- +| math | + --------------------------------------------------------- diff --git a/rosapps/devutils/cputointel/any_op.h b/rosapps/devutils/cputointel/any_op.h index b2e33ec6295..f2cd4041df4 100644 --- a/rosapps/devutils/cputointel/any_op.h +++ b/rosapps/devutils/cputointel/any_op.h @@ -31,6 +31,7 @@ typedef struct _BrainAnalys CPU_INT type; /* 1 = source are memmory, 2 source are register */ /* 4 = dest are memmory, 8 dest are register */ /* 16 = source are imm */ + /* 32 = soucre -xx(r1) or [eax-xx] */ CPU_INT src_size; /* who many bits are src not vaild for reg*/ CPU_INT dst_size; /* who many bits are dst not vaild for reg*/ @@ -38,6 +39,8 @@ typedef struct _BrainAnalys CPU_UNINT64 src; CPU_UNINT64 dst; + CPU_INT src_extra; /* if type == 32 are set */ + CPU_UNINT memAdr; /* where are we in the current memory pos + baseaddress */ CPU_INT row; /* 0 = no row, diff --git a/rosapps/devutils/cputointel/misc.h b/rosapps/devutils/cputointel/misc.h index 9faaf3c8ac0..48999b233f6 100644 --- a/rosapps/devutils/cputointel/misc.h +++ b/rosapps/devutils/cputointel/misc.h @@ -7,6 +7,9 @@ #define CPU_UNINT unsigned int #define CPU_INT int +/* 16 bits signed */ +#define CPU_SHORT short + /* 8bits unsigned */ #define CPU_BYTE unsigned char