mirror of
https://github.com/ufrisk/LeechCore.git
synced 2026-05-06 21:52:44 +08:00
Version 1.16.11
This commit is contained in:
@@ -3,8 +3,8 @@
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#define VERSION_MAJOR 2
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#define VERSION_MINOR 16
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#define VERSION_REVISION 10
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#define VERSION_BUILD 61
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#define VERSION_REVISION 11
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#define VERSION_BUILD 62
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#define VER_FILE_DESCRIPTION_STR "LeechAgent Memory Acquisition Service"
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#define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD
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@@ -3548,7 +3548,7 @@ BOOL DeviceFPGA_Open(_Inout_ PLC_CONTEXT ctxLC, _Out_opt_ PPLC_CONFIG_ERRORINFO
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PLC_DEVICE_PARAMETER_ENTRY pParam;
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BOOL fFT601 = FALSE, fCustomDriver = FALSE;
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BYTE pb200[0x200];
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WORD wDeviceVendorId, wDeviceDeviceId;
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DWORD dwVIDPID;
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if(ppLcCreateErrorInfo) { *ppLcCreateErrorInfo = NULL; }
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ctx = LocalAlloc(LMEM_ZEROINIT, sizeof(DEVICE_CONTEXT_FPGA));
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if(!ctx) { return FALSE; }
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@@ -3617,10 +3617,9 @@ BOOL DeviceFPGA_Open(_Inout_ PLC_CONTEXT ctxLC, _Out_opt_ PPLC_CONFIG_ERRORINFO
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if(ctxLC->fPrintf[LC_PRINTF_V]) {
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*(PDWORD)pb200 = 0;
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DeviceFPGA_PCIeCfgSpaceCoreRead(ctx, pb200, 0x80000000 | 0);
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wDeviceVendorId = *(PWORD)pb200;
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wDeviceDeviceId = *(PWORD)(pb200 + 2);
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dwVIDPID = *(PDWORD)pb200;
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lcprintfv(ctxLC,
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"DEVICE: FPGA: %s PCIe gen%i x%i [%i,%i,%i] [v%i.%i,%04x] [%s,%s] [%04x:%04x]\n",
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"DEVICE: FPGA: %s PCIe gen%i x%i [%i,%i,%i] [v%i.%i,%04x] [%s,%s%s]\n",
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ctx->perf.SZ_DEVICE_NAME,
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DeviceFPGA_PHY_GetPCIeGen(ctx),
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DeviceFPGA_PHY_GetLinkWidth(ctx),
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@@ -3632,8 +3631,7 @@ BOOL DeviceFPGA_Open(_Inout_ PLC_CONTEXT ctxLC, _Out_opt_ PPLC_CONFIG_ERRORINFO
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ctx->wDeviceId,
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(ctx->async2.fEnabled ? "ASYNC" : "SYNC"),
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(ctx->fAlgorithmReadTiny ? "TINY" : "NORM"),
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wDeviceVendorId,
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wDeviceDeviceId
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((!dwVIDPID || (dwVIDPID == 0x066610ee)) ? "" : ",FWCUST")
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);
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}
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if(ctxLC->fPrintf[LC_PRINTF_VV]) {
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@@ -3645,13 +3643,17 @@ fail:
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DeviceFPGA_ConfigPrint(ctxLC, ctx);
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}
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if(szDeviceError && ctxLC->fPrintf[LC_PRINTF_V]) {
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*(PDWORD)pb200 = 0;
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DeviceFPGA_PCIeCfgSpaceCoreRead(ctx, pb200, 0x80000000 | 0);
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dwVIDPID = *(PDWORD)pb200;
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lcprintfv(ctxLC,
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"DEVICE: FPGA: ERROR: %s [%i,v%i.%i,%04x]\n",
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"DEVICE: FPGA: ERROR: %s [%i,v%i.%i,%04x%s]\n",
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szDeviceError,
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ctx->wFpgaID,
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ctx->wFpgaVersionMajor,
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ctx->wFpgaVersionMinor,
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ctx->wDeviceId);
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ctx->wDeviceId,
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((!dwVIDPID || (dwVIDPID == 0x066610ee)) ? "" : ",FWCUST"));
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}
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DeviceFPGA_Close(ctxLC);
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return FALSE;
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@@ -3,8 +3,8 @@
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#define VERSION_MAJOR 2
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#define VERSION_MINOR 16
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#define VERSION_REVISION 10
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#define VERSION_BUILD 61
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#define VERSION_REVISION 11
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#define VERSION_BUILD 62
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#define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library"
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#define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD
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@@ -39,7 +39,7 @@ leechcorepyc = Extension(
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setup(
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name='leechcorepyc',
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version='2.16.10', # VERSION_END
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version='2.16.11', # VERSION_END
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description='LeechCore for Python',
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long_description='LeechCore for Python : native extension for physical memory access',
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url='https://github.com/ufrisk/LeechCore',
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@@ -3,8 +3,8 @@
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#define VERSION_MAJOR 2
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#define VERSION_MINOR 16
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#define VERSION_REVISION 10
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#define VERSION_BUILD 61
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#define VERSION_REVISION 11
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#define VERSION_BUILD 62
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#define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library : Python API"
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#define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD
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