mirror of
https://github.com/ufrisk/LeechCore.git
synced 2026-06-20 10:02:23 +08:00
Version 2.16.1
This commit is contained in:
@@ -225,3 +225,6 @@ v1.0-1.8
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* PCIe BAR information and user callback (easier implementation of custom devices).
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* ARM64 memory dump (.dmp) and VMWare Fusion (.vmem/.vmsn) support.
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* Improved handling of PCIe TLP user callback.
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Latest:
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* I/O BAR support.
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@@ -14,7 +14,7 @@
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// (c) Ulf Frisk, 2020-2023
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// Author: Ulf Frisk, pcileech@frizk.net
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//
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// Header Version: 2.16
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// Header Version: 2.16.1
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//
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#ifndef __LEECHCORE_H__
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@@ -437,12 +437,11 @@ BOOL LcCommand(
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#define LC_CMD_FPGA_TLP_CONTEXT_RD 0x2000011b00000000 // R - get TLP user-defined context to be passed to callback function. [not remote].
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#define LC_CMD_FPGA_TLP_FUNCTION_CALLBACK 0x2000011500000000 // W - set/unset TLP callback function (pbDataIn == PLC_TLP_CALLBACK). [not remote].
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#define LC_CMD_FPGA_TLP_FUNCTION_CALLBACK_RD 0x2000011c00000000 // R - get TLP callback function. [not remote].
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#define LC_CMD_FPGA_BAR_CONTEXT 0x2000011800000000 // W - set/unset BAR user-defined context to be passed to callback function. (pbDataIn == LPVOID user context). [not remote].
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#define LC_CMD_FPGA_BAR_CONTEXT_RD 0x2000011d00000000 // R - get BAR user-defined context to be passed to callback function. [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK 0x2000011900000000 // W - set/unset BAR callback function (pbDataIn == PLC_BAR_CALLBACK). [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK_RD 0x2000011e00000000 // R - get BAR callback function. [not remote].
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#define LC_CMD_FPGA_BAR_INFO 0x0000011a00000000 // R - get BAR info (pbDataOut == LC_BAR_INFO[6]).
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#define LC_CMD_FPGA_BAR_CONTEXT 0x2000012000000000 // W - set/unset BAR user-defined context to be passed to callback function. (pbDataIn == LPVOID user context). [not remote].
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#define LC_CMD_FPGA_BAR_CONTEXT_RD 0x2000012100000000 // R - get BAR user-defined context to be passed to callback function. [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK 0x2000012200000000 // W - set/unset BAR callback function (pbDataIn == PLC_BAR_CALLBACK). [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK_RD 0x2000012300000000 // R - get BAR callback function. [not remote].
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#define LC_CMD_FPGA_BAR_INFO 0x0000012400000000 // R - get BAR info (pbDataOut == LC_BAR_INFO[6]).
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#define LC_CMD_FILE_DUMPHEADER_GET 0x0000020100000000 // R
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@@ -572,8 +571,10 @@ typedef VOID(*PLC_TLP_FUNCTION_CALLBACK)(
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typedef struct tdLC_BAR {
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BOOL fValid;
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BOOL fIO;
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BOOL f64Bit;
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BOOL fPrefetchable;
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DWORD _Filler[3];
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DWORD iBar;
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QWORD pa;
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QWORD cb;
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@@ -3,8 +3,8 @@
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#define VERSION_MAJOR 2
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#define VERSION_MINOR 16
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#define VERSION_REVISION 0
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#define VERSION_BUILD 51
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#define VERSION_REVISION 1
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#define VERSION_BUILD 52
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#define VER_FILE_DESCRIPTION_STR "LeechAgent Memory Acquisition Service"
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#define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD
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@@ -1855,6 +1855,19 @@ BOOL DeviceFPGA_Bar_Initialize(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONTEXT_FPGA
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pBar = &ctx->tlp_callback.Bar[i];
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pBar->iBar = (DWORD)i;
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dwBarSize = *(PDWORD)(pbDRP + 14 + i * 4);
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// IO BAR: IO BARs are not memory mapped and are treated differently here:
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if(dwBarSize & 1) {
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pBar->fIO = TRUE;
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pBar->pa = *(PDWORD)(pbBAR + i * 4) - 1;
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dwBarSize = ((dwBarSize & ~0x01) ^ 0xFFFFFFFF) + 1;
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pBar->cb = dwBarSize;
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if(!pBar->pa || !pBar->cb) { continue; }
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if((pBar->pa >= 0x10000) || (pBar->cb >= 0x10000)) { return FALSE; } // IO BARs must be < 64KB in size and address
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pBar->fValid = TRUE;
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fBAR = TRUE;
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continue;
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}
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// Memory BAR:
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if(dwBarSize & 8) {
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if(i % 2) { return FALSE; } // 64-bit prefetchable BARs not allowed in odd BARs
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pBar->fPrefetchable = TRUE;
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@@ -1867,7 +1880,7 @@ BOOL DeviceFPGA_Bar_Initialize(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONTEXT_FPGA
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if(qwBarSize >= 0x8000000000000000) { return FALSE; } // BAR too large.
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pBar->cb = qwBarSize;
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} else {
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dwBarSize = *(PQWORD)(pbDRP + 14 + i * 4) & ~0xF;
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dwBarSize = *(PDWORD)(pbDRP + 14 + i * 4) & ~0xF;
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dwBarSize = (dwBarSize ^ 0xFFFFFFFF) + 1;
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if(dwBarSize >= 0x80000000) { return FALSE; } // BAR too large.
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pBar->cb = dwBarSize;
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@@ -1959,7 +1972,7 @@ VOID DeviceFPGA_Bar_RxTlp(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONTEXT_FPGA ctx,
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PTLP_HDR_MRdWr32 hdrM32 = (PTLP_HDR_MRdWr32)hdrDwBuf;
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PTLP_HDR_MRdWr64 hdrM64 = (PTLP_HDR_MRdWr64)hdrDwBuf;
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// 1: initial checks and header parse:
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if((cbTlp < 12) || (pbTlp[0] & 0x9e) || (cbTlp & 3)) { return; } // TLP fast fail if not MRd/MWr
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if((cbTlp < 12) || (pbTlp[0] & 0x9c) || (cbTlp & 3)) { return; } // TLP fast fail if not MRd/MWr/IORd/IOWr
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hdrDwBuf[0] = _byteswap_ulong(*(PDWORD)(pbTlp + 0));
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hdrDwBuf[1] = _byteswap_ulong(*(PDWORD)(pbTlp + 4));
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hdrDwBuf[2] = _byteswap_ulong(*(PDWORD)(pbTlp + 8));
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@@ -1972,12 +1985,13 @@ VOID DeviceFPGA_Bar_RxTlp(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONTEXT_FPGA ctx,
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rq.bTag = hdrM32->Tag;
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rq.bFirstBE = hdrM32->FirstBE;
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rq.bLastBE = hdrM32->LastBE;
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rq.f64 = (hdr->TypeFmt == TLP_MRd64) || (hdr->TypeFmt == TLP_MWr64);
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rq.fRead = (hdr->TypeFmt == TLP_MRd32) || (hdr->TypeFmt == TLP_MRd64);
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rq.f64 = (hdr->TypeFmt == TLP_MRd64) || (hdr->TypeFmt == TLP_MWr64) || (hdr->TypeFmt == TLP_IOWr);
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rq.fRead = (hdr->TypeFmt == TLP_MRd32) || (hdr->TypeFmt == TLP_MRd64) || (hdr->TypeFmt == TLP_IORd);
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rq.fReadReply = FALSE;
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rq.fWrite = !rq.fRead;
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// 3: specific TLP type handling:
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switch(hdr->TypeFmt) {
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case TLP_IORd:
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case TLP_MRd32:
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qwTlpAddr = hdrM32->Address & ~3;
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qwTlpSize = hdr->Length ? (hdr->Length << 2) : 0x1000;
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@@ -1987,6 +2001,7 @@ VOID DeviceFPGA_Bar_RxTlp(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONTEXT_FPGA ctx,
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qwTlpAddr = ((QWORD)hdrM64->AddressHigh << 32) + (hdrM64->AddressLow & ~3);
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qwTlpSize = hdr->Length ? (hdr->Length << 2) : 0x1000;
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break;
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case TLP_IOWr:
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case TLP_MWr32:
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qwTlpAddr = hdrM32->Address & ~3;
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qwTlpSize = hdr->Length ? (hdr->Length << 2) : 0x1000;
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@@ -2024,7 +2039,7 @@ VOID DeviceFPGA_Bar_RxTlp(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONTEXT_FPGA ctx,
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ctx->tlp_callback.pfnBarCB(&rq);
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}
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// 6: if read, send reply:
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if((hdr->TypeFmt == TLP_MRd32) || (hdr->TypeFmt == TLP_MRd64)) {
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if((hdr->TypeFmt == TLP_MRd32) || (hdr->TypeFmt == TLP_MRd64) || (hdr->TypeFmt == TLP_IORd)) {
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DeviceFPGA_Bar_TxTlp(ctxLC, ctx, hdrM32, &rq);
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}
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}
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@@ -14,7 +14,7 @@
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// (c) Ulf Frisk, 2020-2023
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// Author: Ulf Frisk, pcileech@frizk.net
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//
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// Header Version: 2.16
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// Header Version: 2.16.1
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//
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#ifndef __LEECHCORE_H__
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@@ -437,12 +437,11 @@ BOOL LcCommand(
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#define LC_CMD_FPGA_TLP_CONTEXT_RD 0x2000011b00000000 // R - get TLP user-defined context to be passed to callback function. [not remote].
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#define LC_CMD_FPGA_TLP_FUNCTION_CALLBACK 0x2000011500000000 // W - set/unset TLP callback function (pbDataIn == PLC_TLP_CALLBACK). [not remote].
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#define LC_CMD_FPGA_TLP_FUNCTION_CALLBACK_RD 0x2000011c00000000 // R - get TLP callback function. [not remote].
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#define LC_CMD_FPGA_BAR_CONTEXT 0x2000011800000000 // W - set/unset BAR user-defined context to be passed to callback function. (pbDataIn == LPVOID user context). [not remote].
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#define LC_CMD_FPGA_BAR_CONTEXT_RD 0x2000011d00000000 // R - get BAR user-defined context to be passed to callback function. [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK 0x2000011900000000 // W - set/unset BAR callback function (pbDataIn == PLC_BAR_CALLBACK). [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK_RD 0x2000011e00000000 // R - get BAR callback function. [not remote].
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#define LC_CMD_FPGA_BAR_INFO 0x0000011a00000000 // R - get BAR info (pbDataOut == LC_BAR_INFO[6]).
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#define LC_CMD_FPGA_BAR_CONTEXT 0x2000012000000000 // W - set/unset BAR user-defined context to be passed to callback function. (pbDataIn == LPVOID user context). [not remote].
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#define LC_CMD_FPGA_BAR_CONTEXT_RD 0x2000012100000000 // R - get BAR user-defined context to be passed to callback function. [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK 0x2000012200000000 // W - set/unset BAR callback function (pbDataIn == PLC_BAR_CALLBACK). [not remote].
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#define LC_CMD_FPGA_BAR_FUNCTION_CALLBACK_RD 0x2000012300000000 // R - get BAR callback function. [not remote].
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#define LC_CMD_FPGA_BAR_INFO 0x0000012400000000 // R - get BAR info (pbDataOut == LC_BAR_INFO[6]).
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#define LC_CMD_FILE_DUMPHEADER_GET 0x0000020100000000 // R
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@@ -572,8 +571,10 @@ typedef VOID(*PLC_TLP_FUNCTION_CALLBACK)(
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typedef struct tdLC_BAR {
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BOOL fValid;
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BOOL fIO;
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BOOL f64Bit;
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BOOL fPrefetchable;
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DWORD _Filler[3];
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DWORD iBar;
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QWORD pa;
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QWORD cb;
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@@ -3,8 +3,8 @@
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#define VERSION_MAJOR 2
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#define VERSION_MINOR 16
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#define VERSION_REVISION 0
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#define VERSION_BUILD 51
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#define VERSION_REVISION 1
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#define VERSION_BUILD 52
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#define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library"
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#define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD
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@@ -251,6 +251,7 @@ BOOL LcPy_BarInfoFetch(PyObj_LeechCore* self)
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PyDict_SetItemString_DECREF(pyDictEntry, "i_bar", PyLong_FromUnsignedLongLong(pBarInfo[i].iBar));
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PyDict_SetItemString_DECREF(pyDictEntry, "base", PyLong_FromUnsignedLongLong(pBarInfo[i].pa));
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PyDict_SetItemString_DECREF(pyDictEntry, "size", PyLong_FromUnsignedLongLong(pBarInfo[i].cb));
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PyDict_SetItemString_DECREF(pyDictEntry, "is_io", PyBool_FromLong((long)pBarInfo[i].fIO));
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PyDict_SetItemString_DECREF(pyDictEntry, "is_64_bit", PyBool_FromLong((long)pBarInfo[i].f64Bit));
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PyDict_SetItemString_DECREF(pyDictEntry, "is_prefetchable", PyBool_FromLong((long)pBarInfo[i].fPrefetchable));
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PyList_Append(pyList, pyDictEntry);
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@@ -39,7 +39,7 @@ leechcorepyc = Extension(
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setup(
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name='leechcorepyc',
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version='2.16.0', # VERSION_END
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version='2.16.1', # VERSION_END
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description='LeechCore for Python',
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long_description='LeechCore for Python : native extension for physical memory access',
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url='https://github.com/ufrisk/LeechCore',
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@@ -3,8 +3,8 @@
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#define VERSION_MAJOR 2
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#define VERSION_MINOR 16
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#define VERSION_REVISION 0
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#define VERSION_BUILD 51
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#define VERSION_REVISION 1
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#define VERSION_BUILD 52
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#define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library : Python API"
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#define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD
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