From 41f9446b2a9f2caf3edbb5b72ac2f13e4a38cc02 Mon Sep 17 00:00:00 2001 From: Ulf Frisk Date: Sat, 2 Aug 2025 00:54:30 +0200 Subject: [PATCH] Version 2.22.3 --- includes/lib32/leechcore.lib | Bin 5360 -> 5360 bytes includes/lib64/leechcore.lib | Bin 5268 -> 5268 bytes includes/libarm64/leechcore.lib | Bin 5268 -> 5268 bytes leechagent/version.h | 4 ++-- leechcore/device_fpga.c | 16 +++++++++++++++- leechcore/version.h | 4 ++-- leechcorepyc/pkggen_linux.sh | 2 +- leechcorepyc/version.h | 4 ++-- 8 files changed, 22 insertions(+), 8 deletions(-) diff --git a/includes/lib32/leechcore.lib b/includes/lib32/leechcore.lib index 1c1c3bb795d35fd6bb65633258aafda379236df6..b665474c034be4a8b43ed695e73a718bfb96ea8f 100644 GIT binary patch delta 114 zcmeyM`9X7o69?z^Gq!j685tNjCf9OFPrkq{J-LyiltqW3w{!9@j%cRd&duSRvW%>A zxxc*JJ$WOy{Nx#288B&eE{Ej&+ycGK6rgHT?sAsXM-84&-oU*9ra*dfJr4)Sj82|( F4gg(ADf0jT delta 114 zcmeyM`9X7o69?zY+VB7P85tNjCf9OFPrkq{J-Lyiltr82SNr5&9MMd_+Bb)D$}+Mx zyB&JGd-6tZ`N=c5GGNl`Tn@?kxdnQeDL~bx+~q7=^A|pwyn%ZIOo8;|dL9mt8J#@o F902+3EZqPA diff --git a/includes/lib64/leechcore.lib b/includes/lib64/leechcore.lib index da21b553e03400db42d147cbad6e42d967476e5d..f8555e4c9959060af6db19ec7d62372897fe991c 100644 GIT binary patch delta 118 zcmbQDIYo2BH+IgOI~u`0zWYj0$=i&g$PUhy6n#{}{%lf5)`OW>wx?J)={nC@?bC<$YDkG`f9M5CQ0RY0o BB_jX; delta 118 zcmbQDIYo2BH+Igs0<&-MGcqu6Og7|_o-D;Nfkm6)SNr639MMd_+Bb7^$}+Mz+DvG8h^-E8l&s_>rsf?s@b3BhJ2LK6P BCe8o= diff --git a/includes/libarm64/leechcore.lib b/includes/libarm64/leechcore.lib index 57e2208887c503c2ba6547cc907ec940c0800dd1..a5563def2b4bda8076a3bc1d15a92e602c480302 100644 GIT binary patch delta 118 zcmbQDIYo2BH+Ig0-#bq6Gcqu6Og7|_o-D;NfklU*w{!A3j%cRd&duDMvWzSV|NOpB z*5T@a$*51h&&2_hoy^TCHJO<^mQ~}yhS&Ee>vG8h^-E8l&s_>rsf?s@b3BhJ2LM72 BCd~i< delta 118 zcmbQDIYo2BH+D{6#s0Vaj0_AMlMT6~CrfcmV9{py)joM0M>Nx~_RZX!vWzUk29Eb9 z>u`0zWYj0$=i&g$PUhy6n#{}{%X*+<#pC;vb-Cn$`lTn&=Pre*R7O&{IiAOq0|53l BCky}p diff --git a/leechagent/version.h b/leechagent/version.h index b052646..642a50e 100644 --- a/leechagent/version.h +++ b/leechagent/version.h @@ -3,8 +3,8 @@ #define VERSION_MAJOR 2 #define VERSION_MINOR 22 -#define VERSION_REVISION 2 -#define VERSION_BUILD 88 +#define VERSION_REVISION 3 +#define VERSION_BUILD 89 #define VER_FILE_DESCRIPTION_STR "LeechAgent Memory Acquisition Service" #define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD diff --git a/leechcore/device_fpga.c b/leechcore/device_fpga.c index 1b7a45e..e243515 100644 --- a/leechcore/device_fpga.c +++ b/leechcore/device_fpga.c @@ -293,6 +293,8 @@ typedef struct tdDEVICE_CONTEXT_FPGA { } tlp_callback; BOOL fFT601; BOOL fCustomDriver; + BOOL fATS; + BYTE bAT; } DEVICE_CONTEXT_FPGA, *PDEVICE_CONTEXT_FPGA; // STRUCT FROM FTD3XX.h @@ -339,7 +341,7 @@ typedef struct { typedef struct tdTLP_HDR { WORD Length : 10; - WORD _AT : 2; + WORD AT : 2; WORD _Attr : 2; WORD _EP : 1; WORD _TD : 1; @@ -2354,6 +2356,7 @@ VOID DeviceFPGA_Synch_ReadScatter_Impl(_In_ PLC_CONTEXT ctxLC, _In_ DWORD cMEMs, BYTE bTag; SIZE_T cbTlpRaw; BYTE pbTlpRaw[TLP_RX_MAX_SIZE]; + BOOL fATS = ctx->fATS; // TX queued RAW TLPs (if any) from other threads and flush: if(ObByteQueue_Size(ctx->tlp_callback.pBqTx)) { while(ObByteQueue_Pop(ctx->tlp_callback.pBqTx, NULL, sizeof(pbTlpRaw), pbTlpRaw, &cbTlpRaw)) { @@ -2392,6 +2395,7 @@ VOID DeviceFPGA_Synch_ReadScatter_Impl(_In_ PLC_CONTEXT ctxLC, _In_ DWORD cMEMs, is32 = pDMA->qwA < 0x100000000; if(is32) { hdrRd32->h.TypeFmt = TLP_MRd32; + if(fATS) { hdrRd32->h.AT = ctx->bAT; } hdrRd32->h.Length = (WORD)((cb < 0x1000) ? cb >> 2 : 0); hdrRd32->RequesterID = ctx->wDeviceId; hdrRd32->Tag = bTag; @@ -2400,6 +2404,7 @@ VOID DeviceFPGA_Synch_ReadScatter_Impl(_In_ PLC_CONTEXT ctxLC, _In_ DWORD cMEMs, hdrRd32->Address = (DWORD)(pDMA->qwA + o); } else { hdrRd64->h.TypeFmt = TLP_MRd64; + if(fATS) { hdrRd64->h.AT = ctx->bAT; } hdrRd64->h.Length = (WORD)((cb < 0x1000) ? cb >> 2 : 0); hdrRd64->RequesterID = ctx->wDeviceId; hdrRd64->Tag = bTag; @@ -2679,6 +2684,7 @@ VOID DeviceFPGA_Async2_Read_TxTlpSingle_MrdTlp(_In_ PLC_CONTEXT ctxLC, _In_ PDEV PTLP_HDR_MRdWr32 hdrRd32 = (PTLP_HDR_MRdWr32)tx; if(f32) { hdrRd32->h.TypeFmt = TLP_MRd32; + if(ctx->fATS) { hdrRd32->h.AT = ctx->bAT; } hdrRd32->h.Length = wTlpDwLength; hdrRd32->RequesterID = ctx->wDeviceId; hdrRd32->Tag = iTag; @@ -2687,6 +2693,7 @@ VOID DeviceFPGA_Async2_Read_TxTlpSingle_MrdTlp(_In_ PLC_CONTEXT ctxLC, _In_ PDEV hdrRd32->Address = (DWORD)(qwA); } else { hdrRd64->h.TypeFmt = TLP_MRd64; + if(ctx->fATS) { hdrRd32->h.AT = ctx->bAT; } hdrRd64->h.Length = wTlpDwLength; hdrRd64->RequesterID = ctx->wDeviceId; hdrRd64->Tag = iTag; @@ -3310,6 +3317,7 @@ VOID DeviceFPGA_ProbeMEM_Impl(_In_ PLC_CONTEXT ctxLC, _In_ QWORD qwAddr, _In_ DW is32 = qwAddr + (i << 12) < 0x100000000; if(is32) { hdrRd32->h.TypeFmt = TLP_MRd32; + if(ctx->fATS) { hdrRd32->h.AT = ctx->bAT; } hdrRd32->h.Length = 1; hdrRd32->RequesterID = ctx->wDeviceId; hdrRd32->FirstBE = 0xf; @@ -3318,6 +3326,7 @@ VOID DeviceFPGA_ProbeMEM_Impl(_In_ PLC_CONTEXT ctxLC, _In_ QWORD qwAddr, _In_ DW hdrRd32->Tag = (BYTE)((i >> 5) & 0x1f); // 5 high address bits coded into tag. } else { hdrRd64->h.TypeFmt = TLP_MRd64; + if(ctx->fATS) { hdrRd32->h.AT = ctx->bAT; } hdrRd64->h.Length = 1; hdrRd64->RequesterID = ctx->wDeviceId; hdrRd64->FirstBE = 0xf; @@ -3376,6 +3385,7 @@ BOOL DeviceFPGA_WriteMEM_TXP(_In_ PLC_CONTEXT ctxLC, _Inout_ PDEVICE_CONTEXT_FPG memset(pbTlp, 0, 16); if(pa < 0x100000000) { hdrWr32->h.TypeFmt = TLP_MWr32; + if(ctx->fATS) { hdrWr32->h.AT = ctx->bAT; } hdrWr32->h.Length = (WORD)(cb + 3) >> 2; hdrWr32->FirstBE = bFirstBE; hdrWr32->LastBE = bLastBE; @@ -3389,6 +3399,7 @@ BOOL DeviceFPGA_WriteMEM_TXP(_In_ PLC_CONTEXT ctxLC, _Inout_ PDEVICE_CONTEXT_FPG cbTlp = (12 + cb + 3) & ~0x3; } else { hdrWr64->h.TypeFmt = TLP_MWr64; + if(ctx->fATS) { hdrWr64->h.AT = ctx->bAT; } hdrWr64->h.Length = (WORD)(cb + 3) >> 2; hdrWr64->FirstBE = bFirstBE; hdrWr64->LastBE = bLastBE; @@ -3848,6 +3859,7 @@ BOOL DeviceFPGA_SetOption_DoLock(_In_ PLC_CONTEXT ctxLC, _In_ QWORD fOption, _In #define FPGA_PARAMETER_DEVICE_ID "bdf" #define FPGA_PARAMETER_DRIVER "driver" #define FPGA_PARAMETER_FT601 "ft601" +#define FPGA_PARAMETER_ATS "ats" #define FPGA_PARAMETER_ALGO_TINY 0x01 #define FPGA_PARAMETER_ALGO_SYNCHRONOUS 0x02 @@ -3885,6 +3897,8 @@ BOOL DeviceFPGA_Open(_Inout_ PLC_CONTEXT ctxLC, _Out_opt_ PPLC_CONFIG_ERRORINFO } if(szDeviceError) { goto fail; } ctx->fRestartDevice = (1 == LcDeviceParameterGetNumeric(ctxLC, FPGA_PARAMETER_RESTART_DEVICE)); + ctx->bAT = (BYTE)LcDeviceParameterGetNumeric(ctxLC, FPGA_PARAMETER_ATS); + ctx->fATS = ((ctx->bAT >= 1) && (ctx->bAT <= 3)); DeviceFPGA_GetDeviceID_FpgaVersion(ctx); if(!ctx->wFpgaVersionMajor) { szDeviceError = "Unable to connect to FPGA device"; diff --git a/leechcore/version.h b/leechcore/version.h index 9ad871b..4cd146a 100644 --- a/leechcore/version.h +++ b/leechcore/version.h @@ -3,8 +3,8 @@ #define VERSION_MAJOR 2 #define VERSION_MINOR 22 -#define VERSION_REVISION 2 -#define VERSION_BUILD 88 +#define VERSION_REVISION 3 +#define VERSION_BUILD 89 #define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library" #define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD diff --git a/leechcorepyc/pkggen_linux.sh b/leechcorepyc/pkggen_linux.sh index 6157cc2..3b9db51 100644 --- a/leechcorepyc/pkggen_linux.sh +++ b/leechcorepyc/pkggen_linux.sh @@ -43,7 +43,7 @@ leechcorepyc = Extension( setup( name='leechcorepyc', - version='2.22.2', # VERSION_END + version='2.22.3', # VERSION_END description='LeechCore for Python', long_description='LeechCore for Python : native extension for physical memory access', url='https://github.com/ufrisk/LeechCore', diff --git a/leechcorepyc/version.h b/leechcorepyc/version.h index 1f17f82..c29bcc7 100644 --- a/leechcorepyc/version.h +++ b/leechcorepyc/version.h @@ -3,8 +3,8 @@ #define VERSION_MAJOR 2 #define VERSION_MINOR 22 -#define VERSION_REVISION 2 -#define VERSION_BUILD 88 +#define VERSION_REVISION 3 +#define VERSION_BUILD 89 #define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library : Python API" #define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD