diff --git a/includes/lib32/leechcore.lib b/includes/lib32/leechcore.lib index 8dbbd66..ef69d48 100644 Binary files a/includes/lib32/leechcore.lib and b/includes/lib32/leechcore.lib differ diff --git a/includes/lib64/leechcore.lib b/includes/lib64/leechcore.lib index a4abadb..bc2719d 100644 Binary files a/includes/lib64/leechcore.lib and b/includes/lib64/leechcore.lib differ diff --git a/includes/libarm64/leechcore.lib b/includes/libarm64/leechcore.lib index bea3bd8..928e71c 100644 Binary files a/includes/libarm64/leechcore.lib and b/includes/libarm64/leechcore.lib differ diff --git a/leechagent/version.h b/leechagent/version.h index 0700835..cb1c11b 100644 --- a/leechagent/version.h +++ b/leechagent/version.h @@ -3,8 +3,8 @@ #define VERSION_MAJOR 2 #define VERSION_MINOR 22 -#define VERSION_REVISION 7 -#define VERSION_BUILD 93 +#define VERSION_REVISION 8 +#define VERSION_BUILD 94 #define VER_FILE_DESCRIPTION_STR "LeechAgent Memory Acquisition Service" #define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD diff --git a/leechcore/device_fpga.c b/leechcore/device_fpga.c index 5a185ed..731dc4b 100644 --- a/leechcore/device_fpga.c +++ b/leechcore/device_fpga.c @@ -2129,9 +2129,12 @@ VOID DeviceFPGA_SynchOldAsync_RxTlpAsynchronous(_In_ PLC_CONTEXT ctxLC, _In_ PDE /* * Recover FTDI/FT601 RX path if FT_ReadPipe/FT_GetOverlappedResult reports -* FT_OTHER_ERROR. The normal TX path already recovers this by reopening the -* FTDI handle; async RX must also reset pending overlapped state and discard +* FT_OTHER_ERROR. Async RX must reset pending overlapped state and discard * any partial receive buffer before the next read attempt. +* Should be called behind: ctx->Lock. +* -- ctx +* -- status +* -- return = TRUE if the connection was re-initialized, FALSE if not. */ static BOOL DeviceFPGA_FTDI_RxRecover(_In_ PDEVICE_CONTEXT_FPGA ctx, _In_ DWORD status) { @@ -2195,7 +2198,7 @@ BOOL DeviceFPGA_TxTlp(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONTEXT_FPGA ctx, _In if((ctx->txbuf.cb >= ctx->perf.MAX_SIZE_TX) || (fFlush && ctx->txbuf.cb)) { status = ctx->dev.pfnFT_WritePipe(ctx->dev.hFTDI, 0x02, ctx->txbuf.pb, ctx->txbuf.cb, &cbTxed, NULL); if(status == FT_OTHER_ERROR) { - DeviceFPGA_ReInitializeFTDI(ctx); // try recovery if possible. + DeviceFPGA_FTDI_RxRecover(ctx, status); // try recovery if possible. status = ctx->dev.pfnFT_WritePipe(ctx->dev.hFTDI, 0x02, ctx->txbuf.pb, ctx->txbuf.cb, &cbTxed, NULL); } ctx->txbuf.cb = 0; @@ -2246,7 +2249,9 @@ BOOL DeviceFPGA_TxTlp_FastWrite_NoLock(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONT if((ctx->txbuf_fastwrite.cb >= ctx->perf.MAX_SIZE_TX) || (fFlush && ctx->txbuf_fastwrite.cb)) { status = ctx->dev.pfnFT_WritePipe(ctx->dev.hFTDI, 0x02, ctx->txbuf_fastwrite.pb, ctx->txbuf_fastwrite.cb, &cbTxed, NULL); if(status == FT_OTHER_ERROR) { - DeviceFPGA_ReInitializeFTDI(ctx); // try recovery if possible. + EnterCriticalSection(&ctx->Lock); + DeviceFPGA_FTDI_RxRecover(ctx, status); // try recovery if possible. + LeaveCriticalSection(&ctx->Lock); status = ctx->dev.pfnFT_WritePipe(ctx->dev.hFTDI, 0x02, ctx->txbuf_fastwrite.pb, ctx->txbuf_fastwrite.cb, &cbTxed, NULL); } ctx->txbuf_fastwrite.cb = 0; @@ -2313,7 +2318,7 @@ VOID DeviceFPGA_Synch_RxTlpSynchronous(_In_ PLC_CONTEXT ctxLC, _In_ PDEVICE_CONT while(TRUE) { // read data: status = ctx->dev.pfnFT_ReadPipe(ctx->dev.hFTDI, 0x82, ctx->rxbuf.pb + ctx->rxbuf.cb, cbReadRxBuf - ctx->rxbuf.cb, &cbRx, NULL); - if(status == FT_OTHER_ERROR && ctx->perf.RETRY_ON_ERROR) { + if((status == FT_OTHER_ERROR) && ctx->perf.RETRY_ON_ERROR) { DeviceFPGA_FTDI_RxRecover(ctx, status); // try recovery if possible. status = ctx->dev.pfnFT_ReadPipe(ctx->dev.hFTDI, 0x82, ctx->rxbuf.pb + ctx->rxbuf.cb, ctx->rxbuf.cbMax - ctx->rxbuf.cb, &cbRx, NULL); } diff --git a/leechcore/leechcore.c b/leechcore/leechcore.c index bc53672..118fd40 100644 --- a/leechcore/leechcore.c +++ b/leechcore/leechcore.c @@ -1,4 +1,4 @@ -// leechcore.c : core implementation of the the LeechCore physical memory acquisition library. +// leechcore.c : core implementation of the LeechCore physical memory acquisition library. // // (c) Ulf Frisk, 2020-2026 // Author: Ulf Frisk, pcileech@frizk.net diff --git a/leechcore/ob/ob_core.c b/leechcore/ob/ob_core.c index f730b32..99f30ab 100644 --- a/leechcore/ob/ob_core.c +++ b/leechcore/ob/ob_core.c @@ -14,7 +14,7 @@ // - such as decreasing reference count of sub-objects contained in the object // that is to be deallocated. // -// (c) Ulf Frisk, 2018-2025 +// (c) Ulf Frisk, 2018-2026 // Author: Ulf Frisk, pcileech@frizk.net // #include "ob.h" @@ -146,7 +146,7 @@ VOID Ob_XDECREF_NULL(_In_opt_ PVOID *ppOb) BOOL Ob_VALID_TAG(_In_ PVOID pObIn, _In_ DWORD tag) { POB pOb = (POB)pObIn; - return pOb && (pOb->_magic2 == OB_HEADER_MAGIC) && (pOb->_magic1 == OB_HEADER_MAGIC) && (pOb->_tag = tag); + return pOb && (pOb->_magic2 == OB_HEADER_MAGIC) && (pOb->_magic1 == OB_HEADER_MAGIC) && (pOb->_tag == tag); } /* diff --git a/leechcore/version.h b/leechcore/version.h index 5889e34..8d50955 100644 --- a/leechcore/version.h +++ b/leechcore/version.h @@ -3,8 +3,8 @@ #define VERSION_MAJOR 2 #define VERSION_MINOR 22 -#define VERSION_REVISION 7 -#define VERSION_BUILD 93 +#define VERSION_REVISION 8 +#define VERSION_BUILD 94 #define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library" #define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD diff --git a/leechcorepyc/pkggen_linux.sh b/leechcorepyc/pkggen_linux.sh index 0637462..c08fcec 100644 --- a/leechcorepyc/pkggen_linux.sh +++ b/leechcorepyc/pkggen_linux.sh @@ -43,7 +43,7 @@ leechcorepyc = Extension( setup( name='leechcorepyc', - version='2.22.7', # VERSION_END + version='2.22.8', # VERSION_END description='LeechCore for Python', long_description='LeechCore for Python : native extension for physical memory access', url='https://github.com/ufrisk/LeechCore', diff --git a/leechcorepyc/version.h b/leechcorepyc/version.h index caa0bfd..c947f44 100644 --- a/leechcorepyc/version.h +++ b/leechcorepyc/version.h @@ -3,8 +3,8 @@ #define VERSION_MAJOR 2 #define VERSION_MINOR 22 -#define VERSION_REVISION 7 -#define VERSION_BUILD 93 +#define VERSION_REVISION 8 +#define VERSION_BUILD 94 #define VER_FILE_DESCRIPTION_STR "LeechCore Memory Acquisition Library : Python API" #define VER_FILE_VERSION VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD